2/Multi-chip Cryogenic Packaging System

In order to achieve high-precision control and high-sensitivity readout of large-scale silicon qubit arrays, we are designing and developing cryogenic CMOS analog circuits (such as AD/DA conversion circuits) that generate qubit control signals and observe the qubit operating environment inside a dilution refrigerator. In dilution refrigerator, in addition to the cryogenic region where qubits are generally stored, there is a low-temperature region of about 3-4K. In these two temperature regions, we implement the qubits and the circuits necessary to control and read out the qubits. In particular, it is necessary to improve the precision of qubit operation by significantly improving the qubit controllability and readout sensitivity by implementing the main circuits in the region where the qubits are placed. We intend to meet this challenge by promoting the development of multi-chip cryogenic packaging system (analog CMOS circuit technology, signaling technology including wireless communication, power supply technology including wireless power transfer, multi-chip packaging technology for cryogenic applications, device and circuit simulation technology, transient temperature analysis technology, etc.) that covers the 100mK to 4.2K temperature range.

R&D Challenges

• 4. Multi-chip cryogenic packagiing

  This R&D challenge has two topics.

  Cryogenic CMOS Analog Circuit

  In order to achieve high-precision control and high-sensitivity readout of large-scale silicon qubit arrays, we are developing cryogenic CMOS analog circuits (such as AD/DA conversion circuits) that generate qubit control signals and observe the qubit operating environment inside a dilution refrigerator. In dilution refrigerator, in addition to the cryogenic region where the qubits are placed, there is a low-temperature region of about 3-4 K. We are developing a technology to control the qubits by placing a control IC in this low-temperature region of about 3-4 K. Cryogenic CMOS analog circuits require a large number of channels to support multiple qubits, and at the same time, they must operate within the limited area and power range of the inside of a dilution refrigerator. The developed chip will be shared as a component of the cryogenic control chip being researched by Hitachi and the environmental monitoring chip being researched by Kobe University to accelerate the development of quantum computer systems based on multi-chip cryogenic packagiing.

  Multi-chip cryogenic packagiing

  We are developing a cryogenic packaging technology for qubits. Qubits are placed in a dilution refrigerator, and a packaging structure that can be efficiently implemented in the limited area of the dilution refrigerator and that is resistant to cryogenic temperatures is required. Another challenge is to propose a packaging structure with high heat removal performance to prevent decoherence of the qubits due to thermal noise. Utilizing the current advanced packaging technology, we will promote the solution of these issues for the development of multi-chip cryogenic packaging system (multi-chip packaging technology for cryogenic, device/circuit simulation technology, transient temperature analysis technology, etc.) for larger scale of qubits.

• 5. Environmental monitoring

  We are developing mechanisms for monitoring the operating environment of multi-qubits and quantum control and high-sensitivity readout mechanisms that are functionally divided and distributed in multiple temperature stages from room temperature to cryogenic temperatures, methods for collecting and analyzing environmental monitoring data, and feedback mechanisms for qubit control and readout operations. In particular, we are developing techniques for monitoring temperature, noise, and signal waveforms that affect the fidelity of qubits by installing sensor circuits in the proximity of the qubits.

• List of research results　" Multi-chip Cryogenic Packaging System "